Amd
amd
288 CVEs • 1,690 products
Products (1,690)
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Products (1,690)
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CVEs (288)
CVE VENDORS PRODUCTS UPDATED PUBLISHED CVSS |
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Incorrect default permissions in the AMD Cloud Manageability Service (ACMS) Software installation directory could allow an attacker to achieve privilege escalation potentially resulting in arbitrary code execution. |
Incorrect default permissions in the AMD Management Plugin for the Microsoft® System Center Configuration Manager (SCCM) installation directory could allow an attacker to achieve privilege escalation, potentially resulti...Show more |
1Amd 2Radeon Software Radeon Software For HipJun 17, 2026 Nov 12, 2024 N/A· v4 7.8 HIGH· v3 N/A· v2 Incorrect default permissions in the AMD HIP SDK installation directory could allow an attacker to achieve privilege escalation potentially resulting in arbitrary code execution. |
Improper input validation in AMD μProf could allow an attacker to perform a write to an invalid address, potentially resulting in denial of service. |
Incorrect default permissions in the AMD μProf installation directory could allow an attacker to achieve privilege escalation, potentially resulting in arbitrary code execution. |
A DLL hijacking vulnerability in AMD μProf could allow an attacker to achieve privilege escalation, potentially resulting in arbitrary code execution. |
Insufficient validation of the Input Output Control (IOCTL) input buffer in AMD μProf may allow an authenticated attacker to cause an out-of-bounds write, potentially causing a Windows® OS crash, resulting in denial of s...Show more |
3Amd ArmTrustedfirmware3Trusted Firmware A Trusted Firmware ATrusted Firmware AJun 17, 2026 Aug 13, 2024 N/A· v4 5.8 MEDIUM· v3 N/A· v2 Improper input validation in ARM® Trusted Firmware used in AMD’s Zynq™ UltraScale+™) MPSoC/RFSoC may allow a privileged attacker to perform out of bound reads, potentially resulting in data leakage and denial of service. |
Improper validation of array index in Power Management Firmware (PMFW) may allow a privileged attacker to cause an out-of-bounds memory read within PMFW, potentially leading to a denial of service. |
1Amd 65Epyc 7203 Firmware Epyc 7203p FirmwareEpyc 72f3 Firmware+62 moreJun 17, 2026 Aug 13, 2024 N/A· v4 10.0 CRITICAL· v3 N/A· v2 Improper re-initialization of IOMMU during the DRTM event may permit an untrusted platform configuration to persist, allowing an attacker to read or modify hypervisor memory, potentially resulting in loss of confidential...Show more |
1Amd 65Epyc 7203 Firmware Epyc 7203p FirmwareEpyc 72f3 Firmware+62 moreJun 17, 2026 Aug 13, 2024 N/A· v4 6.0 MEDIUM· v3 N/A· v2 IOMMU improperly handles certain special address ranges with invalid device table entries (DTEs), which may allow an attacker with privileges and a compromised Hypervisor to induce DTE faults to bypass RMP checks in SEV-...Show more |
1Amd 105Epyc 7001 Firmware Epyc 7203 FirmwareEpyc 7203p Firmware+102 moreJun 17, 2026 Aug 13, 2024 N/A· v4 6.4 MEDIUM· v3 N/A· v2 A TOCTOU (Time-Of-Check-Time-Of-Use) in SMM may allow
an attacker with ring0 privileges and access to the
BIOS menu or UEFI shell to modify the communications buffer potentially
resulting in arbitrary code execution. |
An insufficient DRAM address validation in PMFW may allow a privileged attacker to read from an invalid DRAM address to SRAM, potentially resulting in data corruption or denial of service. |
1Amd 16Athlon Gold 3150g Firmware Athlon Gold 3150u FirmwareAthlon Gold Pro 3150g Firmware+13 moreJun 17, 2026 Aug 13, 2024 N/A· v4 8.2 HIGH· v3 N/A· v2 Improper bounds checking in APCB firmware may allow an attacker to perform an out of bounds write, corrupting the APCB entry, potentially leading to arbitrary code execution. |
1Amd 36Athlon Gold 3150c Firmware Athlon Gold 3150g FirmwareAthlon Gold 3150u Firmware+33 moreJun 17, 2026 Aug 13, 2024 N/A· v4 6.0 MEDIUM· v3 N/A· v2 A malicious attacker in x86 can misconfigure the Trusted Memory Regions (TMRs), which may allow the attacker to set an arbitrary address range for the TMR, potentially leading to a loss of integrity and availability. |
1Amd 69Epyc 7001 Firmware Epyc 7203 FirmwareEpyc 7203p Firmware+66 moreJun 17, 2026 Aug 13, 2024 N/A· v4 8.2 HIGH· v3 N/A· v2 An out of bounds memory write when processing the AMD PSP1 Configuration Block (APCB) could allow an attacker with access the ability to modify the BIOS image, and the ability to sign the resulting image, to potentially...Show more |
1Amd 86Epyc 7203 Firmware Epyc 7203p FirmwareEpyc 72f3 Firmware+83 moreJun 17, 2026 Aug 5, 2024 N/A· v4 7.9 HIGH· v3 N/A· v2 Improper restriction of write operations in SNP firmware could allow a malicious hypervisor to potentially overwrite a guest's memory or UMC seed resulting in loss of confidentiality and integrity. |
1Amd 86Epyc 7203 Firmware Epyc 7203p FirmwareEpyc 72f3 Firmware+83 moreJun 17, 2026 Aug 5, 2024 N/A· v4 7.9 HIGH· v3 N/A· v2 Improper input validation in SEV-SNP could allow a malicious hypervisor to read or overwrite guest memory potentially leading to data leakage or data corruption. |
1Amd 86Epyc 7203 Firmware Epyc 7203p FirmwareEpyc 72f3 Firmware+83 moreJun 17, 2026 Aug 5, 2024 N/A· v4 6.0 MEDIUM· v3 N/A· v2 Improper restriction of write operations in SNP firmware could allow a malicious hypervisor to overwrite a guest's UMC seed potentially allowing reading of memory from a decommissioned guest. |
1Amd 62Epyc 7203 Firmware Epyc 7203p FirmwareEpyc 72f3 Firmware+59 moreJun 17, 2026 Feb 13, 2024 N/A· v4 4.9 MEDIUM· v3 N/A· v2 Due to a code bug in
Secure_TSC, SEV firmware may allow an attacker with high privileges to cause a
guest to observe an incorrect TSC when Secure TSC is enabled potentially
resulting in a loss of guest integrity.
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