Atom C2750

atom_c2750

Vendor: Intel • 6 CVEs

CVEs (6)

CVE VENDORS PRODUCTS UPDATED PUBLISHED CVSS
CVE-2021-33150 1Intel 419Atom C2308 Atom C2316Atom C2338+416 more May 5, 2025 Mar 11, 2022 N/A· v4 6.8 MEDIUM· v3 4.6 MEDIUM· v2 Hardware allows activation of test or debug logic at runtime for some Intel(R) Trace Hub instances which may allow an unauthenticated user to potentially enable escalation of privilege via physical access.
CVE-2020-0551 1Intel 1321Atom C2308 Atom C2316Atom C2338+1318 more Nov 21, 2024 Mar 12, 2020 N/A· v4 5.6 MEDIUM· v3 1.9 LOW· v2 Load value injection in some Intel(R) Processors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access. The list of affected pro...Show more Load value injection in some Intel(R) Processors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access. The list of affected products is provided in intel-sa-00334: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00334.htmlShow less
CVE-2017-5703 1Intel 308Atom C2308 Atom C2316Atom C2338+305 more Nov 21, 2024 Apr 3, 2018 N/A· v4 6.0 MEDIUM· v3 3.6 LOW· v2 Configuration of SPI Flash in platforms based on multiple Intel platforms allow a local attacker to alter the behavior of the SPI flash potentially leading to a Denial of Service.
CVE-2017-5927 5Allwinner AmdIntel+2 more 20A64 Athlon Ii 640 X4Atom C2750+17 more May 13, 2026 Feb 27, 2017 N/A· v4 7.5 HIGH· v3 5.0 MEDIUM· v2 Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern ARM processors. By performing a side-channel attack on the MMU operations, it is possib...Show more Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern ARM processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR.Show less
CVE-2017-5926 5Allwinner AmdIntel+2 more 20A64 Athlon Ii 640 X4Atom C2750+17 more May 13, 2026 Feb 27, 2017 N/A· v4 7.5 HIGH· v3 5.0 MEDIUM· v2 Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern AMD processors. By performing a side-channel attack on the MMU operations, it is possib...Show more Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern AMD processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR.Show less
CVE-2017-5925 5Allwinner AmdIntel+2 more 20A64 Athlon Ii 640 X4Atom C2750+17 more May 13, 2026 Feb 27, 2017 N/A· v4 7.5 HIGH· v3 5.0 MEDIUM· v2 Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern Intel processors. By performing a side-channel attack on the MMU operations, it is poss...Show more Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern Intel processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR.Show less