Cortex X4 Firmware

cortex-x4_firmware

Vendor: Arm • 3 CVEs

CVEs (3)

CVE VENDORS PRODUCTS UPDATED PUBLISHED CVSS
CVE-2025-0647 1Arm 11C1 Premium Firmware C1 Ultra FirmwareCortex A710 Firmware+8 more Jun 17, 2026 Jan 14, 2026 N/A· v4 7.9 HIGH· v3 N/A· v2 In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this ca...Show more In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.Show less
CVE-2024-7881 1Arm 9C1 Premium Firmware C1 Pro FirmwareC1 Ultra Firmware+6 more Jun 17, 2026 Jan 28, 2025 N/A· v4 5.1 MEDIUM· v3 N/A· v2 An unprivileged context can trigger a data memory-dependent prefetch engine to fetch the contents of a privileged location and consume those contents as an address that is also dereferenced.
CVE-2024-5660 1Arm 16Cortex A710 Firmware Cortex A77 FirmwareCortex A78 Firmware+13 more Jun 17, 2026 Dec 10, 2024 N/A· v4 9.8 CRITICAL· v3 N/A· v2 Use of Hardware Page Aggregation (HPA) and Stage-1 and/or Stage-2 translation on Cortex-A77, Cortex-A78, Cortex-A78C, Cortex-A78AE, Cortex-A710, Cortex-X1, Cortex-X1C, Cortex-X2, Cortex-X3, Cortex-X4, Cortex-X925, Neover...Show more Use of Hardware Page Aggregation (HPA) and Stage-1 and/or Stage-2 translation on Cortex-A77, Cortex-A78, Cortex-A78C, Cortex-A78AE, Cortex-A710, Cortex-X1, Cortex-X1C, Cortex-X2, Cortex-X3, Cortex-X4, Cortex-X925, Neoverse V1, Neoverse V2, Neoverse V3, Neoverse V3AE, Neoverse N2 may permit bypass of Stage-2 translation and/or GPT protection.Show less