CVEs (20)
CVE VENDORS PRODUCTS UPDATED PUBLISHED CVSS |
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1Amd 101Ryzen 3100 Firmware Ryzen 3300x FirmwareRyzen 3500 Firmware+98 moreJun 17, 2026 Sep 20, 2023 N/A· v4 5.5 MEDIUM· v3 N/A· v2 Improper initialization of variables in the DXE driver may allow a privileged user to leak sensitive information via local access. |
1Amd 125Epyc 7003 Firmware Epyc 72f3 FirmwareEpyc 7313 Firmware+122 moreJun 17, 2026 Sep 20, 2023 N/A· v4 4.4 MEDIUM· v3 N/A· v2 Improper initialization of variables in the DXE driver may allow a privileged user to leak sensitive information via local access. |
1Amd 104Ryzen 3 3100 Firmware Ryzen 3 3200g FirmwareRyzen 3 3200u Firmware+101 moreJun 17, 2026 Jan 11, 2023 N/A· v4 5.5 MEDIUM· v3 N/A· v2 Failure to validate the integer operand in ASP (AMD Secure Processor) bootloader may allow an attacker to introduce an integer overflow in the L2 directory table in SPI flash resulting in a potential denial of service. |
3Amd FedoraprojectXen169A10 9600p Firmware A10 9630p FirmwareA12 9700p Firmware+166 moreJun 17, 2026 Nov 9, 2022 N/A· v4 5.5 MEDIUM· v3 N/A· v2 IBPB may not prevent return branch predictions from being specified by pre-IBPB branch targets leading to a potential information disclosure. |
1Amd 179Athlon 3050ge Firmware Athlon 3150g FirmwareAthlon 3150ge Firmware+176 moreJun 17, 2026 Aug 10, 2022 N/A· v4 5.6 MEDIUM· v3 N/A· v2 Execution unit scheduler contention may lead to a side channel vulnerability found on AMD CPU microarchitectures codenamed “Zen 1”, “Zen 2” and “Zen 3” that use simultaneous multithreading (SMT). By measuring the content...Show more |
4Amd DebianFedoraproject+1 more126A10 9600p Firmware A10 9630p FirmwareA12 9700p Firmware+123 moreJun 17, 2026 Jul 14, 2022 N/A· v4 6.5 MEDIUM· v3 2.1 LOW· v2 Aliases in the branch predictor may cause some AMD processors to predict the wrong branch type potentially leading to information disclosure. |
4Amd DebianFedoraproject+1 more126A10 9600p Firmware A10 9630p FirmwareA12 9700p Firmware+123 moreJun 17, 2026 Jul 12, 2022 N/A· v4 6.5 MEDIUM· v3 2.1 LOW· v2 Mis-trained branch predictions for return instructions may allow arbitrary speculative code execution under certain microarchitecture-dependent conditions. |
1Amd 142A10 9600p Firmware A10 9630p FirmwareA12 9700p Firmware+139 moreJun 17, 2026 Jun 15, 2022 N/A· v4 6.5 MEDIUM· v3 4.0 MEDIUM· v2 A potential vulnerability in some AMD processors using frequency scaling may allow an authenticated attacker to execute a timing attack to potentially enable information disclosure. |
1Amd 70Ryzen 3 2200u Firmware Ryzen 3 2300u FirmwareRyzen 3 3100 Firmware+67 moreJun 17, 2026 May 12, 2022 N/A· v4 7.8 HIGH· v3 7.2 HIGH· v2 A malicious or compromised UApp or ABL may be used by an attacker to issue a malformed system call to the Stage 2 Bootloader potentially leading to corrupt memory and code execution. |
1Amd 70Ryzen 3 2200u Firmware Ryzen 3 2300u FirmwareRyzen 3 3100 Firmware+67 moreJun 17, 2026 May 12, 2022 N/A· v4 4.4 MEDIUM· v3 4.9 MEDIUM· v2 Insufficient check of the process type in Trusted OS (TOS) may allow an attacker with privileges to enable a lesser privileged process to unmap memory owned by a higher privileged process resulting in a denial of service...Show more |
1Amd 34Radeon Software Ryzen 3 3100 FirmwareRyzen 3 3300g Firmware+31 moreJun 17, 2026 May 12, 2022 N/A· v4 4.4 MEDIUM· v3 3.6 LOW· v2 A malicious or compromised UApp or ABL could potentially change the value that the ASP uses for its reserved DRAM, to one outside of the fenced area, potentially leading to data exposure. |
1Amd 74Athlon 3050ge Firmware Athlon 3150g FirmwareAthlon 3150ge Firmware+71 moreJun 17, 2026 May 12, 2022 N/A· v4 7.8 HIGH· v3 7.2 HIGH· v2 Failure to verify the protocol in SMM may allow an attacker to control the protocol and modify SPI flash resulting in a potential arbitrary code execution. |
1Amd 50Athlon 3050ge Firmware Athlon 3150g FirmwareAthlon 3150ge Firmware+47 moreJun 17, 2026 May 12, 2022 N/A· v4 7.8 HIGH· v3 4.6 MEDIUM· v2 A malicious or compromised UApp or ABL may be used by an attacker to send a malformed system call to the bootloader, resulting in out-of-bounds memory accesses. |
1Amd 63Athlon 3050ge Firmware Athlon 3150g FirmwareAthlon 3150ge Firmware+60 moreJun 17, 2026 May 12, 2022 N/A· v4 7.1 HIGH· v3 3.6 LOW· v2 An attacker, who gained elevated privileges via some other vulnerability, may be able to read data from Boot ROM resulting in a loss of system integrity. |
1Amd 49Ryzen 3 3100 Firmware Ryzen 3 3300g FirmwareRyzen 3 3300x Firmware+46 moreJun 17, 2026 May 12, 2022 N/A· v4 5.5 MEDIUM· v3 4.9 MEDIUM· v2 Insufficient DRAM address validation in System Management Unit (SMU) may result in a DMA (Direct Memory Access) read/write from/to invalid DRAM address that could result in denial of service. |
1Amd 84Epyc 72f3 Firmware Epyc 7313 FirmwareEpyc 7313p Firmware+81 moreJun 17, 2026 May 11, 2022 N/A· v4 5.5 MEDIUM· v3 4.9 MEDIUM· v2 A bug in AMD CPU’s core logic may allow for an attacker, using specific code from an unprivileged VM, to trigger a CPU core hang resulting in a potential denial of service. AMD believes the specific code includes a speci...Show more |
1Amd 126A10 9600p Firmware A10 9630p FirmwareA12 9700p Firmware+123 moreJun 17, 2026 Mar 11, 2022 N/A· v4 5.6 MEDIUM· v3 1.9 LOW· v2 LFENCE/JMP (mitigation V2-2) may not sufficiently mitigate CVE-2017-5715 on some AMD CPUs. |
1Amd 126A10 9600p Firmware A10 9630p FirmwareA12 9700p Firmware+123 moreJun 17, 2026 Mar 11, 2022 N/A· v4 6.5 MEDIUM· v3 2.1 LOW· v2 Some AMD CPUs may transiently execute beyond unconditional direct branches, which may potentially result in data leakage. |
1Amd 112Epyc 7002 Firmware Epyc 7003 FirmwareEpyc 7232p Firmware+109 moreJun 17, 2026 Nov 16, 2021 N/A· v4 5.5 MEDIUM· v3 2.1 LOW· v2 Insufficient DRAM address validation in System Management Unit (SMU) may result in a DMA read from invalid DRAM address to SRAM resulting in SMU not servicing further requests. |
1Amd 95Epyc 7002 Firmware Epyc 7003 FirmwareEpyc 7232p Firmware+92 moreJun 17, 2026 Nov 16, 2021 N/A· v4 5.5 MEDIUM· v3 4.9 MEDIUM· v2 Insufficient bounds checking in System Management Unit (SMU) may cause invalid memory accesses/updates that could result in SMU hang and subsequent failure to service any further requests from other components. |