Non-Transparent Sharing of Microarchitectural Resources

Hardware structures shared across execution contexts (e.g., caches and branch predictors) can violate the expected architecture isolation between contexts.

CVEs (3)

CVE VENDORS PRODUCTS UPDATED PUBLISHED CVSS
CVE-2023-38575 - - Jun 17, 2026 Mar 14, 2024 N/A· v4 5.5 MEDIUM· v3 N/A· v2 Non-transparent sharing of return predictor targets between contexts in some Intel(R) Processors may allow an authorized user to potentially enable information disclosure via local access.
CVE-2023-40540 1Intel 56Nuc 11 Enthusiast Kit Nuc11phki7c Firmware Nuc 11 Enthusiast Mini Pc Nuc11phki7caa FirmwareNuc 11 Performance Kit Nuc11pahi30z Firmware+53 more Jun 17, 2026 Nov 14, 2023 N/A· v4 4.4 MEDIUM· v3 N/A· v2 Non-Transparent Sharing of Microarchitectural Resources in some Intel(R) NUC BIOS firmware may allow a privileged user to potentially enable information disclosure via local access.
CVE-2023-1998 2Debian Linux 2Debian Linux Linux Kernel Jun 17, 2026 Apr 21, 2023 N/A· v4 5.6 MEDIUM· v3 N/A· v2 The Linux kernel allows userspace processes to enable mitigations by calling prctl with PR_SET_SPECULATION_CTRL which disables the speculation feature as well as by using seccomp. We had noticed that on VMs of at least o...Show more The Linux kernel allows userspace processes to enable mitigations by calling prctl with PR_SET_SPECULATION_CTRL which disables the speculation feature as well as by using seccomp. We had noticed that on VMs of at least one major cloud provider, the kernel still left the victim process exposed to attacks in some cases even after enabling the spectre-BTI mitigation with prctl. The same behavior can be observed on a bare-metal machine when forcing the mitigation to IBRS on boot command line. This happened because when plain IBRS was enabled (not enhanced IBRS), the kernel had some logic that determined that STIBP was not needed. The IBRS bit implicitly protects against cross-thread branch target injection. However, with legacy IBRS, the IBRS bit was cleared on returning to userspace, due to performance reasons, which disabled the implicit STIBP and left userspace threads vulnerable to cross-thread branch target injection against which STIBP protects.Show less